A place to jot down notes on the Arduino Yun, Dragino 2, and Carambola2. Documentation seems quite sparse and inconsistent on the Yun, and similarly on the Dragino, so I want to gather stuff that I glean from forum posts, source code, etc. into a single resource.
Overview
Arduino Yun is an Atheros SoC, using UBoot to run OpenWrt (it was originally a Linino build, but not any more), and an AVR ATmega32U4 MCU, connected via UART peripherals on each.
The Dragino MS14 and the Carambola2 are very similar to the SoC side of the Yun, in that they are all based on the Atheros AR9331 SoC. However, only the Yun has an MCU on the main board.
MCU Bootloader
The bootloader on the MCU seems to be Caterina-Yun. There’s probably a lot more to it than this. Here are some config lines from arduino/avr/boards.txt: –
# Excerpts only! See original file for full configuration. yun.name=Arduino Yún yun.vid.0=0x2341 yun.pid.0=0x0041 yun.vid.1=0x2341 yun.pid.1=0x8041 yun.upload.protocol=avr109 yun.bootloader.tool=avrdude yun.bootloader.low_fuses=0xff yun.bootloader.high_fuses=0xd8 yun.bootloader.extended_fuses=0xfb yun.bootloader.file=caterina/Caterina-Yun.hex yun.bootloader.unlock_bits=0x3F yun.bootloader.lock_bits=0x2F yun.build.mcu=atmega32u4 yun.build.board=AVR_YUN yun.build.core=arduino yun.build.variant=yun
Flashing the MCU (Dragino Lora Gateway/MS14)
Upload the sketch via SSH to /tmp/sketch.hex, and run the following command: –
/usr/bin/run-avrdude /tmp/sketch.hex -v
This process neither requires a bootloader, nor needs to include one, since we’re bit-banging the SPI pins on the MCU. For reference, the resulting invocation of avrdude is as follows: –
avrdude -c linuxgpio -C /etc/avrdude.conf -p m328p -U lfuse:w:0xFF:m -U hfuse:w:0xDE:m -U efuse:w:0x05:m -Uflash:w:/tmp/sketch.hex:i -v
Bridge
Part of the bootloader seems to run the MCU side of the ‘Bridge’, which is essentially some code that provides communication facilities between the MCU and the SoC. I’m not sure if this is officially the Bridge, but since sketches can be uploaded over WiFi, there must be some serial communication being initiated by the bootloader.
There are corresponding bridge components on the SoC, which are Python 2.7 scripts launched using the ‘run-bridge’ script. So far, I can only assume that ‘run-bridge’ is launched using a serial terminal by the MCU – I can find no references to it in the SoC startup code. Still to find the code for Bridge.begin() in among the sources.
What is YunSerialTerminal?
The route data takes on a PuTTY serial terminal is – PuTTY -> Virtual USB Serial (e.g. COM4) -> MCU USB -> YunSerialTerminal -> Serial1 -> SoC /dev/ttyATH0 -> ash –login, and then back again.
It has to use this convoluted route, because no UART on the SoC is brought out to pins on the board (note to self: try a USB/TTL UART dongle, and update this paragraph).
The bridge seems to give access to the serial monitor via port 6571 (e.g. telnet localhost 6571). This is how the Arduino IDE gets access to the serial output over the network.
WiFi
WiFi falls back to access-point mode if it fails to associate. This isn’t very convenient to me – I can easily use the console or Ethernet port to fix problems (or just move it back in range of my router, as is usually the solution when testing/developing).
Comment out the ‘/etc/rc.local’ command ‘wifi-live-or-reset’ (for reference, this is found in ‘/usr/bin/’).
Below is the sequence of messages to expect from a properly associated WiFi session.
root@Arduino:/# dmesg|grep wlan0 [ 53.620000] wlan0: authenticate with 00:50:7f:7f:xx:xx [ 53.620000] wlan0: direct probe to 00:50:7f:7f:xx:xx(try 1/3) [ 53.840000] wlan0: send auth to 00:50:7f:7f:xx:xx(try 2/3) [ 53.850000] wlan0: authenticated [ 53.890000] wlan0: associate with 00:50:7f:7f:xx:xx(try 1/3) [ 53.900000] wlan0: RX AssocResp from 00:50:7f:7f:xx:xx (capab=0x411 status=0 aid=3) [ 53.900000] wlan0: associated
ATmega32U4
From avrdude.conf, the following info gives some quick info: –
part id = "m32u4"; desc = "ATmega32U4"; signature = 0x1e 0x95 0x87; has_jtag = yes; chip_erase_delay = 9000; pagel = 0xD7; bs2 = 0xA0; reset = dedicated; pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1", "x x x x x x x x x x x x x x x x"; chip_erase = "1 0 1 0 1 1 0 0 1 0 0 0 0 0 0 0", "x x x x x x x x x x x x x x x x"; ... memory "eeprom" paged = no; /* leave this "no" */ page_size = 8; /* for parallel programming */ size = 1024; min_write_delay = 9000; max_write_delay = 9000; ... memory "flash" paged = yes; size = 32768; page_size = 128; num_pages = 256; min_write_delay = 4500; max_write_delay = 4500; ... memory "lfuse" size = 1; memory "hfuse" size = 1; memory "efuse" size = 1; memory "lock" size = 1; memory "calibration" size = 1; memory "signature" size = 3;
U-Boot (SoC) Bootloader
Below is the output from U-Boot when the Yun starts up (actually this is from a Dragino V2, running the Yun image).
U-Boot 1.1.4 (Aug 12 2012 - 20:14:51) AP121-2MB (ar9330) U-boot DRAM: #### TAP VALUE 1 = f, 2 = 10 64 MB Top of RAM usable for U-Boot at: 84000000 Reserving 212k for U-Boot at: 83fc8000 Reserving 192k for malloc() at: 83f98000 Reserving 44 Bytes for Board Info at: 83f97fd4 Reserving 36 Bytes for Global Data at: 83f97fb0 Reserving 128k for boot params() at: 83f77fb0 Stack Pointer at: 83f77f98 Now running in RAM - U-Boot at: 83fc8000 id read 0x100000ff flash size 16777216, sector count = 256 Flash: 16 MB In: serial Out: serial Err: serial Net: ag7240_enet_initialize... No valid address in Flash. Using fixed address No valid address in Flash. Using fixed address : cfg1 0x5 cfg2 0x7114 eth0: 00:03:7f:09:xx:xx eth0 up : cfg1 0xf cfg2 0x7214 eth1: 00:03:7f:09:xx:xx athrs26_reg_init_lan ATHRS26: resetting s26 ATHRS26: s26 reset done eth1 up eth0, eth1 Hit any key to stop autoboot: 0 dr_boot> printenv bootargs=console=ttyS0,115200 root=31:02 rootfstype=squashfs init=/sbin/init mtdparts=ar7240-nor0:256k(u-boot),8192k(kernel),7808k(rootfs),64k(config),64k(ART) bootdelay=4 baudrate=115200 ethaddr=0xa8:0x40:0x41:0xff:0xff:0xff filesize=540000 fileaddr=81000000 ipaddr=192.168.255.1 serverip=192.168.255.2 bootcmd=bootm 0x9fea0000 stdin=serial stdout=serial stderr=serial ethact=eth
Dragino MS14 JTAG Pins
These are currently wrong on the wiki and in the architecture overview. They are (based on the schematics): –
________
GPIO26 | 1* 2 | GPIO27
JTAG_TMS | 3 4 | JTAG_TCK
JTAG_TDI | 5 6 | JTAG_TDO
3V3 | 7 8 | GND
LED4 | 9 10 | LED5
----------
Dragino MTD Layout
root@Dragino2:/# cat /proc/mtd dev: size erasesize name mtd0: 00040000 00010000 "u-boot" mtd1: 00010000 00010000 "u-boot-env" mtd2: 00e50000 00010000 "rootfs" mtd3: 00700000 00010000 "rootfs_data" mtd4: 00140000 00010000 "kernel" mtd5: 00010000 00010000 "nvram" mtd6: 00010000 00010000 "art" mtd7: 00f90000 00010000 "firmware"
The following is from dmesg, showing start and end addresses of each MTD character device:
[ 0.720000] Creating 7 MTD partitions on "spi0.0": [ 0.720000] 0x000000000000-0x000000040000 : "u-boot" [ 0.730000] 0x000000040000-0x000000050000 : "u-boot-env" [ 0.730000] 0x000000050000-0x000000ea0000 : "rootfs" [ 0.740000] 0x0000007a0000-0x000000ea0000 : "rootfs_data" [ 0.750000] 0x000000ea0000-0x000000fe0000 : "kernel" [ 0.750000] 0x000000fe0000-0x000000ff0000 : "nvram" [ 0.750000] 0x000000ff0000-0x000001000000 : "art" [ 0.760000] 0x000000050000-0x000000fe0000 : "firmware"
Backup the MTD character devices over SSH with the following Bash command: –
kevin@kaka:~/SoC/Dragino2$ for d in 0 1 2 3 4 5 6 7; do ssh root@192.168.1.30 "cat /dev/mtd${d}ro; exit" >dragino2.mtd${d}ro.dump; done
Change IP address to that of the target board. Best have your public key installed in /etc/dropbear/authorized_keys to save having to enter a password for each ssh call.
The ‘art’ device is the most important, since it contains calibration data that is unique to a board.
Dragino Lora Gateway (and MS14) Network Configuration
To simplify the network configuration to simply have two Ethernet ports and a WiFi client interface (e.g. not running as an access point), I used the following configurations. It’s enough to use /etc/init.d/network reload after making network configuration changes. Always be prepared for something to fail (e.g. make sure you have what’s needed to access the serial console).
/etc/config/network:
root@dragino-lora:~# cat /etc/config/network config interface 'loopback' option ifname 'lo' option proto 'static' option ipaddr '127.0.0.1' option netmask '255.0.0.0' config interface 'lan1' option proto 'dhcp' option dns '8.8.8.8' option ifname 'eth0' option netmask '255.255.255.0' option gateway '255.255.255.255' config interface 'lan2' option proto 'dhcp' option dns '8.8.8.8' option ifname 'eth1' option netmask '255.255.255.0' option gateway '255.255.255.255' config interface 'wifi' option proto 'dhcp' option dns '8.8.8.8' option ifname 'wlan0' option netmask '255.255.255.0' option gateway '255.255.255.255' config interface option ifname 'bat0'
/etc/config/wireless:
root@dragino-lora:~# cat /etc/config/wireless config wifi-device 'radio0' option type 'mac80211' option phy 'phy0' option htmode 'HT40-' list ht_capab 'SHORT-GI-40' list ht_capab 'DSSS_CCK-40' option hwmode '11ng' option disabled '0' option noscan '1' option channel '6' config wifi-iface 'sta_0' option device 'radio0' option ifname 'wlan0' option mode 'sta' option network 'wifi' option encryption 'mixed-psk+tkip+aes' option ssid '<YOUR SSID>' option key '<YOUR PASSPHRASE>' option disabled '0'
Key links to resources
Caterina Yun Bootloader – https://github.com/ffissore/platform-avr/tree/master/bootloaders/caterina
An example of where the setup() and loop() functions are called from the bootloader – https://github.com/ffissore/platform-avr/blob/master/cores/arduino/main.cpp
Wikipedia page on Amtel AVR – en.wikipedia.org/wiki/Atmel_AVR
OpenWrt UCI configuration interface – http://wiki.openwrt.org/doc/uci
WiFi deauthentication reason codes – http://steev.wordpress.com/2010/03/31/deauthentication-reason-codes/
Hotplug2 infrastructure on OpenWrt – http://wiki.openwrt.org/doc/techref/hotplug
Dragino 2 Downloads – http://www.dragino.com/downloads/index.php?dir=motherboards/ms14/
OpenWrt Flash Layout (MTD) – http://wiki.openwrt.org/doc/techref/flash.layout
Linux-MIPS Wiki on JTAG – http://www.linux-mips.org/wiki/JTAG
Good information,
I am using Carambola2 module and i interfaced it with Avr ic. Can i use flash dragino firmware in carambola2? means HE and carambola2 are same?
They are similar, since they use the same SoC, but they are not the same. They may use quite different flash memory layouts, different Ethernet configurations etc. I wouldn’t expect the firmware to be interchangeable. However, it’s relatively easy to build firmware for either device, so you could take the bits from Dragino that you want to use on your Carambola.